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[VHDL-FPGA-Verilog] c_xapp260

Description: xilinx应用指南xapp260的中文翻译版本。利用 Xilinx FPGA 和存储器接口生成器简化存储器接口。本白皮书讨论各种存储器接口控制器设计所面临的挑战和 Xilinx 的解决方案，同时也说明如何使用 Xilinx软件工具和经过硬件验证的参考设计来为您自己的应用（从低成本的 DDR SDRAM 应用到像 667 Mb/sDDR2 SDRAM 这样的更高性能接口）设计完整的存储器接口解决方案。-The use of Xilinx FPGA and Memory Interface Generator to simplify memory interface. This white paper discusses the various memory interface controller design challenges facing Warfare and Xilinx solutions, but also explains how to use Xilinx Software tools and hardware-proven reference designs to be for your own With (from low-cost DDR SDRAM applications to such as 667 Mb/s This higher performance DDR2 SDRAM interface) design a complete deposit Storage device interface solution.
Platform: | Size: 1123328 | Author: 陈阳 | Hits:

[VHDL-FPGA-Verilog] burstpage

Description: SDRAM控制器在FPGA实现源代码，能实现burst传输-SDRAM controller in FPGA realization of the source code, can achieve burst transfer
Platform: | Size: 253952 | Author: 弘历 | Hits:

[VHDL-FPGA-Verilog] lcd2vga_um

Description: LCD加速芯片，用fpga+sdram做的-LCD acceleration chip, using fpga+ sdram do
Platform: | Size: 980992 | Author: 李锦龙 | Hits:

[VHDL-FPGA-Verilog] FPGA_SDRAM

Description: FPGA对SDRAM的控制操作源码,用VERILOG硬件描述语言编写,包含的文件一共有:hostcont.v,inc.h,pinouts.ucf,sdram.v,top.v,tst_inc.h-Control of operation of the SDRAM FPGA source code, using VERILOG hardware description language, the file contains a total of: hostcont.v, inc.h, pinouts.ucf, sdram.v, top.v, tst_inc.h
Platform: | Size: 21504 | Author: 陈维 | Hits:

[VHDL-FPGA-Verilog] paper_FPGA

Description: 基于FPGA控制的高速固态存储器设计，对固态存储器进行了需求分析, 根据航天工程对高速固态存储器的需求, 确定了设计方案。 针对航天工程对高速固态存储器速率要求较高的特点, 在逻辑设计方面采用流水线技术、并行总线技术。在器件选择方面, 采用LVDS构成接口电路, FPGA构成控制逻辑电路电路, SDRAM芯片阵列构成存储电路。设计了高速固态存储器。该设计简化了硬件电路, 大大提高了存储数据的速率。-FPGA-based control design of high speed solid state memory, solid state memory of the needs analysis carried out, according to aerospace engineering demand for high-speed solid-state memory, set design. Aerospace engineering for high-speed solid-state memory features require a higher rate, in the logic design using pipelining, parallel bus technology. In the device selection, the use of LVDS interface circuit composition, FPGA control logic circuit form, SDRAM chips constitute a memory circuit array. Design of high speed solid state memory. The design simplifies the hardware circuit, greatly increased the rate of stored data.
Platform: | Size: 262144 | Author: lyh | Hits:

[Software Engineering] DDR2deFPGAsheji

Description: 使用 Virtex-4 FPGA 器件实现DDR SDRAM控制器以及DDR2 SDRAM操作时序-Using the Virtex-4 FPGA devices to achieve DDR SDRAM and DDR2 SDRAM controller operation timing
Platform: | Size: 2525184 | Author: 张桃源 | Hits:

[VHDL-FPGA-Verilog] fpgaexperiment_sourcecode

Description: FPGA实现七个实验的源程序。SDRAM测试，按键及PIO口中断实验，定时器实验，seg7实验，sopc_led实验，flash烧写，fpga_led，锁相环。-FPGA realization of the seven experiments of the source. SDRAM test, test buttons and PIO port interrupt, timer experiment, seg7 experiment, sopc_led test, flash programming, fpga_led, PLL.
Platform: | Size: 12833792 | Author: Air | Hits:

[VHDL-FPGA-Verilog] sdram_test

Description: FPGA测试程序，使用XC3S250E对SDRAM进行读写的测试程序，SDRAM使用的是HY57V281620， 大小为128M。-FPGA test procedure, the use of XC3S250E SDRAM read and write on the test procedure, SDRAM using HY57V281620, size of 128M.
Platform: | Size: 541696 | Author: gq | Hits:

[VHDL-FPGA-Verilog] sdram

Description: 关于SDRAM的读写相对比较复杂，本文件是基于FPGA的SDRAM的读写，可做参考-SDRAM read and write on the relatively complex, this document is based on the FPGA-SDRAM read and write, do reference
Platform: | Size: 264192 | Author: Tom | Hits:

[VHDL-FPGA-Verilog] controller-design-of-sdram-

Description: 基于FPGA对sdram控制器的设计（VERILOG语言）-FPGA-based controller design of sdram (VERILOG language)
Platform: | Size: 2823168 | Author: 黄飞 | Hits:

[VHDL-FPGA-Verilog] SDRAM

Description: FPGA的SDRAM FPGA的SDRAMFPGA的SDRAM-FPGA SDRAM FPGA SDRAM
Platform: | Size: 4290560 | Author: 陈华峰 | Hits:

[VHDL-FPGA-Verilog] SDRAM

Description: 用FPGA实现对sdram读写的源代码，芯片用的是Altera公司的，需要的同学可以看看！-FPGA realization of sdram read and write the source code, the chip using Altera' s, students need to take a look!
Platform: | Size: 521216 | Author: zhachshen | Hits:

[VHDL-FPGA-Verilog] sdram_hr_hw_4port

Description: FPGA控制SDRAM的源程序,SDRAM控制起来比较麻烦,时序复杂,本程序将其封装了一个模块,可以方便地调用.-FPGA to control the source of SDRAM, SDRAM control is too much trouble, the timing complexity of the procedure to package a module, you can easily call.
Platform: | Size: 2339840 | Author: 刘成岩 | Hits:

[VHDL-FPGA-Verilog] FPGA_DDR-SDRAM

Description: FPGA对SDRAM的控制，有部分源码，-FPGA SDRAM control, part of the source,...
Platform: | Size: 5399552 | Author: | Hits:

[Other] sdram-ctrl

Description: FPGA sdram 全页模式控制，用verilog语言写的，非常的精简，控制方便-FPGA sdram full-page mode control, written in verilog language is compact, easy to control
Platform: | Size: 6144 | Author: 方道门 | Hits:

[VHDL-FPGA-Verilog] FPGA--SDRAM

Description: SDRAM:Synchronous Dynamic Random Access Memory- 同步动态随机存储器，同步是指 Memory工作需要同步时钟，内部的命令的发送与数据的传输都以它为基准；动态是指存储阵列需要不断的刷新来保证数据不丢失；随机是指数据不是线性依次存储，而是自由指定地址进行数据读写。
Platform: | Size: 19928064 | Author: 官雄辉 | Hits:

[VHDL-FPGA-Verilog] SDRAM

Description: FPGA上实现SDRAM初始化及控制源程序-Implemented on FPGA SDRAM initialization and control source
Platform: | Size: 5035008 | Author: 李丽 | Hits:

[VHDL-FPGA-Verilog] my_sdram_mdl

Description: 此功能为altera fpga 的sdram 控制器，串口接收与发送(This feature altera fpga sdram controller, serial port to receive and send)
Platform: | Size: 1206272 | Author: flyhouse112 | Hits:

[Other] SDRAM

Description: 在FPGA平台上运行，经过调试，是好使的，此程序能帮助使用者充分理解SDRAM的意义。(It is easy to run on the FPGA platform and be debugged. This program can help users fully understand the meaning of SDRAM)
Platform: | Size: 3386368 | Author: Arrich Long | Hits:

[VHDL-FPGA-Verilog] SDRAM

Description: 基于fpga与verilog语言的的sdram读写(SDRAM reading and writing based on FPGA and Verilog language)
Platform: | Size: 6144 | Author: 司王星 | Hits:
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